BCM91125E ? pci evaluation board for bcm1125h processor BCM91125E pci evaluation board ? bcm1125h system on a chip (soc): 64-bit mips processor socs running at 600 mhz-1 ghz 32-kb instruction and 32-kb data cache 256k l2 cache soldered-down 128-mb ddr sdram 32-bit, 33/66-mhz, full-length pci form factor: configured as pci target device operable with 3.3v or 5v pci interface two gigabit ethernet ports on an i/o bracket: 10/100/1000base-t on standard cat 5 utp cable 802.3 compliant status leds showing link status and activity one port configurable to 8-bit packet fifo interface four-character led display for system boot error codes one serial port on an i/o bracket, that is configured as a standard asynchronous uart with an rs232 interface one hypertransport? connector: supports hypertransport, smbus, and generic bus signals one mezzanine socket that supports gmii, serial bus, generic bus, and gpio signals standard 4-pin disk drive power connector for stand-alone operation promice connector for code testing and development ejtag header for bcm1125h debug and test for additional information about the bcm1125h processor, refer to the bcm112x product brief. 91125e features
overview ? phone: 949-450-8700 fax: 949-450-8710 e-mail: info@broadcom.com web: www.broadcom.com broadcom corporation 16215 alton parkway, p.o. box 57013 irvine, california 92619-7013 ? 2004 by broadcom corporation. all rights reserved. 91125e-pb02-r 03/23/04 broadcom ? , the pulse logo, and connecting everything ? are trademarks of broadcom corporation and/ or its subsidiaries in the united states and certain other countries. all other trademarks mentioned are the property of their respective owners. product overview the BCM91125E is a full-length pci evaluation board with the sibyte? bcm1125h mips processor soc. the board is designed for software development and developing pci applications, which require high-performance processors. the BCM91125E can be plugged into a pci slot in any pc, workstation or server, or can be used as a stand-alone device. the BCM91125E comes with 128 mb of ddr sdram soldered down, two gigabit ethernet ports for network connectivity, a hypertransport (formerly ldt) connector, and a mezzanine socket for connection to daughter cards. daughter cards can access hypertransport, gmii, serial bus, smbus, generic bus, and gpio signals from the board by connecting to the appropriate sockets. for additional information about the bcm1125h processors, refer to the bcm112x product brief. firmware the BCM91125E board is provided with the common firmware environment (cfe), which supports 32-bit and 64-bit operation. the cfe solution initializes the cpu and peripherals on the bcm1125h, including the l2 cache, memory controller, ethernet macs, and uarts. it also configures the hypertransport fabric. the cfe provides an environment for downloading and booting an operating system using a disk, flash memory, the network, or the host as its boot device. operating system support three operating systems are provided for the BCM91125E : vxworks ? with 64-bit support for data. developers need to use the tornado ? tools for 64-bit support. the bsp for BCM91125E in source form is available initially only from broadcom. linux ? running in 64-bit mode. full source code is a available at http://oss.sgi.com/mips/downloads.html, the mips-linux repository, with full support by montavista (www.mvista.com). netbsd version running in 32-bit mode. support is provided by wasabi systems (www.wasabisystems.com). development tools broadcom supports the gnu toolchain and cross compilation from x86/ linux ? and sparc/solaris? systems. broadcom has partnered with corelis and greenhills software to provide various options for debugging access through the bcm1125h ejtag port. corelis provides a powerful source-level gui debugger that works with both parallel and networked coreli s probes. this is adapted for the bcm1125h, and allows the registers of the internal peripherals to be examined easily. in addition, broadcom has enhanced the gnu debugger (gdb) to use the corelis ejtag probes. jtag 256 bits ? core clock, 128-gbps 10/100/1000 mac 10/100/1000 mac fifo ht host bridge 26 gbps 55 mbps 19.2 gbps 55 mbps 1 gbps 6.7 gbps 2.1 gbps zbbus 32-bit pci data mover sb - 1 core 256-kb l2 cache ddr memory controller serial interface serial interface debug/ trace gpio/ interrupt pcmcia dual smbus generic bus and flash i/o
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